1. Field of the Invention
The present invention relates to a peak detect-and-hold circuit and method thereof, more particularly to a peak detect-and-hold circuit and method thereof using a ramp sampling technique.
2. Description of the Related Art
Generally, a peak detect-and-hold circuit is for detecting and holding the peak voltage of a voltage wave such as a sinusoidal wave. Its applications include nuclear pulse spectroscopy and automatic gain control, etc.
FIG. 1 is a circuit diagram illustrating a conventional peak detect-and-hold circuit. As shown in the figure, the conventional peak detect-and-hold circuit receives an input voltage Vi, and outputs a tracking voltage VT. It includes an operational transconductance amplifier OTA, a diode D, and a holding capacitor Ch. The positive terminal and the negative terminal of the operational transconductance amplifier OTA receive the input voltage Vi and the feedback tracking voltage VT, respectively. When the tracking voltage VT is smaller than the input voltage Vi, indicating the input voltage Vi is still rising, the operational transconductance amplifier OTA conducts the diode D and charges the holding capacitor Ch so that the tracking voltage VT keeps tracking the input voltage VT; when the input voltage VT is equal to the tracking voltage VT, the operational transconductance amplifier OTA cuts off the diode, and stops charging the holding capacitor Ch so as to hold the tracking voltage VT at the peak voltage.
Therefore, a function of the operational transconductance amplifier OTA is to control the conduction of the diode D based on the comparison of the tracking voltage VT and the input voltage Vi. Accordingly, the input voltage Vi may be tracked by the tracking voltage across the holding capacitor Ch until the peak voltage has been reached. The other function of the operational transconductance amplifier OTA is being the charging current source of the holding capacitor Ch.
There are three typical types of error of the conventional peak detect-and-hold circuit, namely the pedestal voltage, overshoot voltage and voltage droop, as illustrated in the waveform diagram of FIG. 2. The pedestal voltage is the constant difference between the input voltage Vi and the tracking voltage VT, caused, for example, by the offset error of the operational transconductance amplifier OTA. The overshoot voltage refers to the amount of the tracking voltage VT exceeding the peak voltage, caused by the delay of the operational transconductance amplifier OTA to cut off the diode D when the tracking voltage VT reaches the peak voltage of the input voltage Vi. Voltage droop is the gradual decrease of the tracking voltage VT after the holding capacitor Ch is stopped being charged, caused by the leakage through the parasitic capacitors of the diode D and the operational transconductance amplifier OTA connected with the holding capacitor Ch.
Hence, the present invention proposes a peak detect-and-hold circuit and method thereof using a ramp sampling technique to reduce the errors of peak detecting and holding, namely the pedestal voltage, overshoot voltage and voltage droop.